Invalid wires do not count as mistakes in Logic Gate Puzzle — the engine silently rejects malformed connections such as cycles, duplicate drivers, and unknown ports, so the attempt never enters the graph and never consumes one of your two allowed errors. A "mistake" in this game has a deliberately narrow definition: it is one complete, structurally valid graph that the Boolean evaluator resolves to FALSE at the final OUTPUT. Cycles cannot even be evaluated, so they are not errors at all — they are simply not allowed. Any wire you try to draw into an occupied input, from an input, to an output, or back to itself is refused instantly without changing the board, and you keep going. This distinction matters because the game tracks only logical errors at the graph level, while structural rejection is a guardrail you can lean on while you experiment. Knowing what does and does not count changes how confidently you can drag a wire into unknown territory, and that is the foundation of the route to 1,000 points across five fixed levels.
What the Game Actually Counts as a Mistake
The error counter in Logic Gate Puzzle is tied to one specific event: a complete graph whose final OUTPUT resolves to FALSE. "Complete" means every declared gate input has exactly one incoming wire, the final OUTPUT input has exactly one incoming wire, and every gate output has a directed path to the final output. Once that condition is met, the evaluator walks backward from the OUTPUT through its drivers, applies the truth tables for AND, OR, and NOT, and produces a Boolean verdict. If the verdict is TRUE, the level is solved for 200 points. If the verdict is FALSE, the engine records one logical error against your run. That single rule is the entire mistake system.
Anything that happens before the graph is complete — partial diagrams, missing wires, dangling connections — is treated as in-progress work and never touches the error log. The same is true for any attempt the validator refuses at the door. Those attempts include a directed cycle (because cycles cannot be evaluated), a second driver aimed at an already-occupied input, an OUT-to-OUT attempt, an IN-to-IN attempt, a self-link, a duplicate edge with the same FROM and TO, and any reference to a port that does not exist on the current board. None of these are evaluated, so none of them are errors.
Why Invalid Wires Are Rejected Instead of Counted
The game separates structural rejection from logical evaluation because the two failure modes mean very different things for a player. A structural rejection means the system has not accepted your wire, so it cannot have produced a wrong answer — there is no result to score, good or bad. A logical FALSE means the system has accepted your graph and produced an answer, and that answer is wrong. Counting both under the same error budget would punish experimentation, because every rejected attempt would burn a chance even though it changed nothing. By keeping rejections silent, the game lets you probe the board, learn its fan-out limits, and test ports without paying for the lessons.
This is also why duplicate edges are caught. A duplicate FROM-to-TO pair is treated as the same edge the second time, so it cannot smuggle a second driver onto an input. The puzzle enforces the rule that each input is driven by exactly one upstream source by refusing any wire that would break it. The validator is the gatekeeper; the truth tables are the grader; the error counter only listens to the grader.
How to Play Logic Gate Puzzle: A Five-Level Walkthrough
The interaction model is the same on every board, so once you learn it for the first level you can apply it to all five. The steps below use the exact operations the game accepts.
- Select an OUT port on a SOURCE or on a gate. The selected output is highlighted and named in the wire ledger at the bottom of the board.
- Select an empty IN port on a gate or on the final OUTPUT. A directed wire is created from the chosen OUT to the chosen IN, and the ledger lists the new edge as FROM to TO.
- Repeat for every required IN port. An OUT may fan out to more than one destination; each IN accepts exactly one driver.
- To revise a wire, click a filled IN port while no OUT is selected. The wire is removed and that IN becomes empty again, ready for a new connection.
- Build the complete graph, then let the evaluator walk from OUTPUT back through the gates. A TRUE verdict solves the level for 200 points; a FALSE verdict records one recoverable error.
The five fixed boards introduce each gate in turn and then combine them. Level 1 introduces AND with one TRUE source and one FALSE distractor, so you must fan the TRUE source out to both AND inputs. Level 2 introduces OR with three sources and asks you to keep at least one TRUE while filling both gate inputs. Level 3 introduces NOT and turns a FALSE source into a usable TRUE. Levels 4 and 5 stack the gates: one inverts a FALSE source before joining it with a TRUE source through AND, and the final board feeds an OR branch and a NOT branch into a last AND gate. Truth-table behavior for all three gates is documented in the MIT OpenCourseWare introduction to digital electronics linked at the end of this article.
The Two-Error Run Rule and the 1,000-Point Path
A run in Logic Gate Puzzle can absorb two logical errors before it locks. Each error is a complete graph that evaluates to FALSE, so each one represents a real attempt at a wrong solution. The engine also deduplicates by edge signature, meaning if you rebuild exactly the same wrong edge set after correcting it, that rebuild does not consume a second error. Only a distinct complete FALSE graph closes the run. There is no partial credit, no speed bonus, no timer, no hidden multiplier, and no adaptive difficulty. Restart always returns you to the first board with empty wires and a zero score.
Because each solved level awards a flat 200 points, the arithmetic of the perfect run is fixed. Five solved levels at 200 points each produce an exact total of 1,000 points:
200 + 200 + 200 + 200 + 200 = 1,000.
There is no other way to reach 1,000, and there is no way to earn more than 1,000 in a single run. The score you see at the end is therefore a direct count of how many of the five fixed boards you solved before a second distinct FALSE graph closed the run, or whether you finished all five without ever submitting a wrong graph.
Recovering from a Wrong Wire Without Restarting
Because invalid wires are never written to the graph, recovery is built into the interaction. The standard repair move is to click the filled IN port you want to change while no OUT port is selected. The wire disappears, that input becomes empty, and you can route a different OUT into it. This works whether the previous connection was part of a complete graph or part of an unfinished draft. It also works for both pointer and keyboard play — Tab moves through every port, and Enter or Space selects an output, connects an input, or disconnects an occupied input.
This matters in practice because the opening AND level is the first place fan-out becomes useful. If you wire both AND inputs from the FALSE source instead of the TRUE source, the graph is structurally valid but resolves to FALSE, and the engine records it as a mistake once the graph is complete. The recovery is to click each filled IN port to disconnect it, then route the TRUE source to both inputs so the AND gate receives two TRUE drivers. No restart is required, the score stays where it was, and the error counter keeps its previous count of one logical mistake.
What Is and Is Not Tracked by the Error System
Players often assume any failed action burns a life, which would make Logic Gate Puzzle feel like a wire-cutting bomb module. The game is built the opposite way. The table below summarizes which interactions change the board and which interactions leave the error counter alone.
| Action | Accepted? | Counts as a mistake? |
|---|---|---|
| Wire an empty IN from a selected OUT | Yes | Only if the resulting complete graph evaluates to FALSE |
| Draw a wire to an already-occupied IN | No | No |
| Draw a wire from an IN port | No | No |
| Draw a wire from one OUT to another OUT | No | No |
| Draw a self-link on the same node | No | No |
| Draw a directed cycle | No | No |
| Duplicate an existing FROM-to-TO edge | No | No |
| Disconnect a filled IN by clicking it | Yes | No |
| Rebuild the same wrong edge set after a FALSE | Yes, but deduped | No |
| Submit a complete graph that evaluates to FALSE | Yes | Yes — one of two allowed |
| Submit a second distinct complete FALSE graph | Yes | Yes — closes the run |
Reading the table closely, the only row that closes the run is the last one, and both the second-to-last and the last rows consume the error budget. Every other row is a non-event from the perspective of the error counter.
Keyboard, Touch, and Pointer Routes All Behave the Same
The mistake rule does not change with input device. Pointer and touch players click large source, gate, input, and output buttons; keyboard players use Tab to move through every port and Enter or Space to select an output, connect an input, or disconnect an occupied input. The selected output is visually and textually identified, every connected input names its driver, and the wire ledger lists each edge as FROM to TO. Because the validator is the same code path on every device, a wire the game refuses on touch is also a wire the game refuses on keyboard, and neither path counts it as a mistake.
Why the Rule Feels Different From Other Puzzle Games
Many browser puzzles treat any wrong move as a strike. Logic Gate Puzzle takes the opposite stance because the puzzle is about constructing a directed graph, not picking from a list. Once the graph is complete, the answer is deterministic — there is nothing to "guess again" at. Charging the player for malformed attempts would punish the exploration that the game is actually teaching. The two-error ceiling exists only to prevent a player from submitting the same wrong topology forever, which is why the deduplication rule is also part of the design: a corrected mistake should not be re-chargeable against you.
The truth-table references that ground AND, OR, and NOT are independent of the game, so the same logical rules apply whether you are wiring the puzzle or reading the MIT and Northwestern sources below. The game is entertainment and introductory practice, not a transistor simulator, and it makes no claims about propagation delay, voltage thresholds, electrical loading, or physical hardware. Everything runs locally in the browser, with no account, download, upload, API, remote solver, or personal data. Only your shared best completed score may remain in this browser.
For players who want a wider read on how rejected edges versus wrong graphs interact with the score, the related Circuit Logic Game: Five Boolean Puzzles to TRUE guide walks the same five-level route from a circuit-building angle. For a deeper read on what each gate is supposed to do in real digital electronics, the MIT OpenCourseWare introduction to digital handout and the Northwestern University mechatronics logic-gates page document the four AND rows, four OR rows, and two NOT rows that the evaluator applies to your graph.
Related reading: Easy Logic Grid Puzzle Puzzles: A Four-Clue Walkthrough.